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SOLVED: Homework: Write Verilog code and testbench to implement another 4-bit ALU capable of performing four operations (AND, OR, ADD, SUB) based on the diagram shown below. In your code, you use the adderasubtractor module from Lab 8 to perform the addition and subtraction; and the given mux4rl to selection the operation:module Alu(A, B, operation, result);linputs and outputs input [1:0] gperation;operationadd subInstantiate AND gate and OR gateconnect M to gperation[0]MUXresultandInstantiate
SOLVED: Homework: Write Verilog code and testbench to implement …
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