Semiconductor Engineering

Using Graph Attention for Virtual Metrology in Semiconductor Manufacturing (Intel Foundry, ASU)

Researchers from Arizona State University and Intel Foundry have published “Graph Attention-Based Virtual Metrology for Film ...
Semiconductor Engineering

The Sub-2nm Paradox

Reducing variation in manufacturing, monitoring behavior over time, and targeting specific workloads can have a big impact on ...
IEEE

Generating Temporal Contact Graphs Using Random Walkers

Abstract: We study human mobility networks through timeseries of contacts between individuals. Our proposed Random Walkers Induced temporal Graph (RWIG) model generates temporal graph sequences based ...
IEEE

ML-Assisted Compact Modeling of Feedback Field-Effect Transistors Using a Gated Recurrent Unit for Circuit Simulation

Abstract: In this paper, we propose a compact model for feedback field-effect transistors (FBFETs), based on a gated recurrent unit (GRU) neural network, enabling fast and accurate circuit-level ...