techxplore

Tiny silicon structures compute with heat, achieving 99% accurate matrix multiplication

MIT researchers have designed silicon structures that can perform calculations in an electronic device using excess heat instead of electricity. These tiny structures could someday enable more ...
Ars Technica

Would you call this a "Layer 0" switch?

I am developing a product that is, conceptually, very, very similar to this existing product, but better : There is no Ethernet PHY in this product; it's just a tree of electro-mechanical relays, and ...
IEEE

MH-SpGEMM: Efficient Sparse General Matrix-Matrix Multiplication on Modern GPUs via Masking and Hashing Cooperative Optimization

Abstract: Sparse General Matrix-Matrix Multiplication (SpGEMM) is a core operation in high-performance computing applications such as algebraic multigrid solvers, machine learning, and graph ...
IEEE

FPGA Matrix Multiplication Optimization Using the WOS Dataflow Strategy

Abstract: Matrix multiplication is one of the most important operations in both scientific computing and deep-learning applications. However, on regular processors such as CPUs and GPUs, the ...