To efficiently and profitably exploit millions of available SoC gates, companies must acquire pre-verified IP blocks in the same way they now buy pre-tested chips. To do this, SoC design teams must ...

Ken Albin, Manager, Design Verification and Advanced Tools, Architectures and Systems Platforms, Hillel Miller, CAD Manager, Networking and Computing Systems Group, Motorola Semiconductor, Products ...

Most advanced node system-on-chip (SoC) designs are very large, and very complex. They typically contain many blocks and intellectual property (IP) that perform specialized functions, such as ...

The problem with today's existing methodologies is that verification issubservient to design. This principle requires a shift in paradigm,especially in designing complex electronic systems. Why?

Based on more than 250 engineer-years of development, a formal verification tool purports to detect all functional errors in complex digital IP blocks. The tool, 360 Module Verifier (360 MV), is the ...