Implementation of a modular cache data structure, to simulate the working of multiple cache level hierarchy design with victim cache for multiple configurations (cache size, block size and ...
A technical paper titled “Improving the Representativeness of Simulation Intervals for the Cache Memory System” was published by researchers at Complutense University of Madrid, imec, and KU Leuven.
I am a graduate student in Computer Engineering specializing in Digital VLSI,Computer Architecture and Embedded system design. Im eagerly looking for a summer internship in any of these domains.
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