Electronic Design

FPGA Prototyping Tool Aligns With ASIC Flow

Over a third of all high-end ASIC designers now use FPGAs for prototyping 500,000-plus-gate designs. Driving this trend is the fact that a median application-specific integrated-circuit (ASIC) design ...
Design-Reuse

Synopsys Unveils Fusion Compiler, Enabling 20 Percent Higher Quality-of-Results and 2X Faster Time-to-Results

MOUNTAIN VIEW, Calif. -- Nov. 6, 2018 -- Synopsys, Inc. (Nasdaq: SNPS) today unveiled Fusion Compiler™, an innovative RTL-to-GDSII product that enables a new era in digital design implementation. By ...
Design-Reuse

Synopsys' Physical Compiler Enables Tape Out of Enterprise Server ASIC

MOUNTAIN VIEW, Calif.----Oct. 16, 2000--Synopsys, Inc. (Nasdaq:SNPS), today announced that Unisys Corporation has successfully used Physical Compiler, Synopsys' Physical Synthesis tool, to tape out a ...
Nasdaq

Synopsys and GLOBALFOUNDRIES Collaborate to Expand Fusion Compiler Benefits for Latest Platforms

Close collaboration on technology enablement unlocks optimal PPA potential of GLOBALFOUNDRIES® 12LP and 12LP+ (12nm FinFET) platforms and 22FDX® (22nm FD-SOI) platforms Targeted innovations in Fusion ...